1. Field of the Invention
The present invention relates to an electronic flash device suitable for use in a camera. In particular, the present invention relates to a safety measure for a flash control circuit which excites, in a separately excited flyback manner, a transformer for use in charging a main capacitor for the flash device.
2. Description of the Related Art
In recent years, as a flash control circuit for use in a camera having a built-in flash, excited oscillation-type flyback charging circuits have been used.
A conventional flash charging circuit will be described with reference to FIG. 5. In FIG. 5, reference numeral 1 represents a battery serving as an electrical power supply, reference numeral 2 represents an oscillation transformer for boosting a flyback pulse generated in its primary coil and outputting the same to its secondary coil, reference numeral 3 represents a switching device for controlling the current flowing through the primary coil of the transformer 2, reference numeral 4 represents a resistor connected between a control electrode of the switching device 3 and GND, which resistor is provided for preventing a malfunction when no signal is fed to the switching device. Reference numeral 5 represents a diode for use in rectification, and connected in a manner such that it can rectify the output of the secondary coil of the oscillation transformer. Reference numeral 6 represents a main capacitor, reference numeral 7 represents a voltage detecting circuit for detecting a charge/voltage level across the main capacitor 6 and outputting the detection result to a controller (e.g., CPU 10), reference numeral 8 represents a light emitting unit consisting of an electric discharge tube and a trigger circuit for triggering a light emission from the electric discharge tube, and reference numeral 9 represents a power supply capacitor connected in parallel with the battery 1.
Next, a description will be given to explain a control circuit for controlling various functional portions, including a flash charging circuit, in a camera.
Referring again to FIG. 5, reference numeral 11 represents a main IC which is responsible for controlling the camera, and contains a CPU 10 for carrying out overall control. A high-speed oscillator 13 is connected to a high-speed oscillating circuit 12 provided within the main IC 11, while a low-speed oscillator 15 is connected to a low-speed oscillating circuit 14 also provided within the main IC 11. A clock signal output by the high-speed oscillating circuit provides an operation clock signal when the CPU 10 is operating normally, while a clock signal output by the low-speed oscillating circuit provides an operation clock signal when the CPU 10 is operating at low speed, and also provides a clock signal for time measurement.
In the main IC 11, an output port 19 of the CPU 10 is connected to the control terminal of the switching device 3.
Furthermore, the output of the voltage detecting circuit 7 of the flash charging circuit is input to the main IC 11 by connection to an input port 20 of the CPU 10 contained in the main IC 11.
The operation of the flash charging circuit will be described with reference to FIG. 2.
FIG. 2 is an explanatory graph showing the waveforms of various portions in the flash charging circuit shown in FIG. 5, starting from the beginning of a charging operation of the flash.
As shown in the graph, the main IC 11 starts a boosting operation from the beginning of the charging process, by switching between H and L (high and low levels) at the output port 19 of the CPU 10 at predetermined intervals thereby driving the control terminal of the switching device 3.
Whenever the output port 19 of the CPU 10 is at the H level, the control terminal of the switching device 3 is also raised to the H level, thereby turning on the switching device 3.
Once the switching device 3 is ON, a current begins to flow gradually, corresponding to the ON resistance of the switching device 3, and also to the DC resistance of the primary coil of the transformer 2.
After a predetermined time has passed and when the output port 19 is at the L level, the control terminal of the switching device 3 will also be at the L level, so that the switching device is turned off.
At this time, due to the current flowing through the primary coil of the transformer 2, a flyback pulse will occur in the secondary coil of the transformer 2. Thus, the rectification diode 5 is used to rectify the flyback pulse occurring in the secondary coil, so that a charging current will flow to the main capacitor 16, thereby increasing the charging voltage on the main capacitor 16. Then, once a predetermined time has passed, the secondary current will stop.
Thereafter, the CPU 10 again operates to set the level at the output port 19 to H, thereby repeating the charging operation.
Subsequently, the CPU 10 manipulates the voltage detecting circuit 7 to detect the charging voltage of the capacitor 16. In fact, such a detection is continued until the output of the voltage detecting circuit 7 reaches a predetermined value.
In this way, the flash charging circuit of the type using a combination of a separately excited oscillation and a flyback circuit and using the CPU or the like to properly control the switching device connected with the primary coil makes it possible to efficiently control the boosting operation in a manner such that the switching device and transistors will not cause current saturation.
For this reason, from the start of a charging operation to its end, it is possible to perform a flash charging operation with a high conversion efficiency using a substantially constant current, simply by supplying some relatively simple oscillation control signals having a constant duty and a constant frequency.
However, with regard to the above-described separately excited-type charging method, if a micro-computer malfunctions due to static electricity or the like, or if the charging voltage fails to be detected because the charging voltage detecting circuit has not been connected or becomes disconnected, a large current will continue to flow, which is undesirable.
In order to overcome the above-described drawback, Japanese Patent Laid-open No. 2000-275704 suggests preparing a CPU only for use in switching the primary coil, and another CPU serving as the main CPU for use in camera control, so as to prevent damage to the main CPU even if the CPU for controlling the primary coil in the flash is out of order.
For example, referring to FIG. 5, if the CPU is out of control while the output port 19 of the CPU is still at the H level, or if the operation of the high-speed oscillation circuit has stopped while the output port 19 of the CPU is still at the H-level, a large current will continue to flow to the primary coil of the oscillation transformer 2.
When the CPU is out of order, a commonly adopted safety measure is to reset the CPU itself by means of a watchdog timer contained in the CPU. However, it is difficult to perform such a reset operation if the oscillating circuit of the watchdog timer itself has stopped.
Namely, even from Japanese Patent Laid-open No. 2000-275704 it is understood that once the CPU for controlling the primary coil is out of order while the output port of the CPU for controlling the flash is at the H level, even if the main CPU is operating normally, it is impossible to stop the current on the primary side of the flash charging circuit.
The present invention has been accomplished in view of the above drawbacks, and it is an object of the invention to provide an improved apparatus whose operation can be stopped immediately, even if the controller of a separately excited charging circuit of a flash apparatus fails to operate normally.
In one aspect, the present invention relates to an apparatus comprising a CPU which receives clock signals from at least two oscillators including a first oscillator and a second oscillator; a flash control circuit of a separately excited oscillating type which is controlled by signals from the CPU; a switching device that repeatedly switches between ON and OFF states in accordance with switching signals from the CPU; a transformer working in accordance with the ON/OFF state of the switching device; a main capacitor charged by the output of the transformer; a first timer working in accordance with a clock signal from the first oscillator; a second timer working in accordance with a clock signal from the second oscillator; and a protection circuit that switches the switching device to the OFF state in accordance with a timer signal output of any one of the first and second timers, independently of the switching signals from the CPU.
In another aspect, the present invention relates to an apparatus comprising a clock circuit for supplying a first clock signal having a frequency capable of driving a CPU in a first mode, and a second clock signal capable of driving the CPU in a second mode at a frequency lower than that of the first clock signal; a flash control circuit of a separately excited oscillating type controlled by control signals from the CPU; a switching device that repeatedly switches between ON and OFF states in accordance with switching signals from the CPU; a transformer working in accordance with the ON/OFF state of the switching device; a main capacitor charged by the output of the transformer; a first timer working in accordance with a first clock signal; a second timer working in accordance with a second clock signal; and a protection circuit that switches the switching device to the OFF state in accordance with a timer signal output of any one of the first and second timers, independently of the switching signals from the CPU.
Further objects, features and advantages of the present invention will become apparent from the following description of the preferred embodiments with reference to the attached drawings.